Formal Semantics and Proof Techniques for Optimizing VHDL Models
| Author | : Kothanda Umamageswaran |
| Publisher | : Springer Science & Business Media |
| Total Pages | : 169 |
| Release | : 2012-12-06 |
| ISBN-13 | : 9781461551232 |
| ISBN-10 | : 1461551234 |
| Rating | : 4/5 (34 Downloads) |
Book Synopsis Formal Semantics and Proof Techniques for Optimizing VHDL Models by : Kothanda Umamageswaran
Download or read book Formal Semantics and Proof Techniques for Optimizing VHDL Models written by Kothanda Umamageswaran and published by Springer Science & Business Media. This book was released on 2012-12-06 with total page 169 pages. Available in PDF, EPUB and Kindle. Book excerpt: Written expressly for hardware designers, this book presents a formal model of VHDL clearly specifying both the static and dynamic semantics of VHDL. It provides a mathematical framework for representing VHDL constructs and shows how those constructs can be formally manipulated to reason about VHDL.
