"This Master's thesis is intended to familiarize the reader with the asynchronous delay-insensitive NULL convention Logic (NCL) paradigm and illustrate the desi

Designing Asynchronous Circuits using NULL Convention Logic (NCL) begins with an introduction to asynchronous (clockless) logic in general, and then focuses on

"This Master's thesis outlines the design of a completely asynchronous Field Programmable Gate Array (FPGA) for implementing NULL Convention Logic (NCL) digital

This book introduces a wide range of existing and potential applications for asynchronous circuits, each accompanied with the corresponding circuit design theor

Designing Asynchronous Circuits using NULL Convention Logic (NCL) begins with an introduction to asynchronous (clockless) logic in general, and then focuses on